High-Performance Voltage Level Shifter Design Using TSMC 130nm CMOS Technology
Hicham GUISSI, Fatima-Zohra AHAMRI, Khadija SLAOUI, Rachid EL ALAMI
Abstract. Power-efficient integrated circuits often need to deal with differing voltages, so getting the voltages to shift properly and reliably is essential to get the signals to propagate correctly. In this paper, we present a design and implementation of a low-power, high-speed voltage level shifter that is specifically designed to be used with circuits for lithium-ion battery chargers. It was designed using TSMC’s 130nm CMOS process technology and our simulations showed that it is able to shift voltages of 1.8V and 5V with a propagation delay of 0.09 ns. This design surpasses the previous ones, since they usually experience a delay of 0.15 ns. This shows that our proposed voltage level shifter is suitable for high performance VLSI systems with dynamic voltage operation.
Keywords
CMOS Circuitry, Voltage Level Shifting, Propagation Delay, TSMC130nm
Published online 4/25/2026, 8 pages
Copyright © 2026 by the author(s)
Published under license by Materials Research Forum LLC., Millersville PA, USA
Citation: Hicham GUISSI, Fatima-Zohra AHAMRI, Khadija SLAOUI, Rachid EL ALAMI, High-Performance Voltage Level Shifter Design Using TSMC 130nm CMOS Technology, Materials Research Proceedings, Vol. 64, pp 904-911, 2026
DOI: https://doi.org/10.21741/9781644904091-112
The article was published as article 112 of the book Energy Futures
Content from this work may be used under the terms of the Creative Commons Attribution 3.0 license. Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI.
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